1. Field of the Invention
The present invention relates to a method of producing an integrated thin film semiconductor device, and particularly, to a method of producing an active matrix type liquid crystal display device.
2. Description of the Related Art
An active matrix type liquid crystal display device has been conventionally known. This device comprises pixel electrodes arranged in a matrix form more than several hundred x several hundred on a glass substrate, and thin film transistors individually arranged for the respective pixel electrodes.
The thin film transistors arranged for the respective pixel electrodes serve to control electric charges flowing into and out of the respective pixel electrodes.
Further, there has been known a technique in which peripheral drive circuits for driving the thin film transistors arranged for the pixel electrodes are also formed of thin film transistor circuits. This structure is called a peripheral drive circuit integration type.
When such an active matrix type liquid crystal display device is manufactured, there is observed a phenomenon in which some of the thin film transistors integrated on the glass substrate do not work.
The present inventors made an extensive study to solve the above problem, and to obtain the following findings.
In case of manufacturing an integrated semiconductor device such as an active matrix type liquid crystal display device, insulating films and wirings are formed by using a plasma CVD method or a sputtering method, and plasma etching.
In the plasma CVD method or the sputtering method, and plasma etching, there are not a few ions having high energy (high energy ions).
On the other hand, an insulating film formed by using the plasma CVD method or the sputtering method has such a problem that the film quality is not dense, and the withstand voltage thereof is low. In general, the withstand voltage is less than about several tens V.
Here the situation as shown in FIG. 12 is examined. FIG. 12(B) is a sectional view showing a step for manufacturing a thin film transistor having a structure as shown in FIG. 12(A).
FIG. 12(B) shows the state in which a second interlayer insulating film 55 is formed. In general, the plasma CVD method or the sputtering method is used to form an interlayer insulating film. In this step, the above described high energy ions are inputted into a sample.
In general, a source electrode 54 and a gate electrode 51 are not conductive. Therefore, when high energy ions are partially inputted, there arises a state in which the source (S) electrode 54 and the gate (G) electrode 51 are charged at different potentials.
In such a situation, the potential difference between the source (S) electrode 54 and the gate (G) electrode 51 may instantaneously reach to several tens V to several hundred V.
The source electrode 54 and the gate electrode 51 are arranged through an active layer 52 and a gate insulating film 53.
As described above, the withstand voltage of the gate insulating film 53 formed by the CVD method or the sputtering method is less than several tens V. Therefore, according to the situation, the gate insulating film 53 may be electrically broken.
When the gate insulating film is broken, the thin film transistor does not work.
In the structure of the active matrix type display device in which several hundred x several hundred of thin film transistors are arranged, and further as a substrate an insulator such as glass or quartz is used, the above-mentioned phenomenon is particularly actualized.
To solve the above problem, during the film formation of the insulating film 55, the source electrode 54 and the gate electrode 51 may only be electrically shorted, so that both the electrodes have an equal potential. However, in the state in which a final operation is carried out, the source electrode 54 and the gate electrode 51 must not be electrically shorted.
Accordingly, in the step as shown in FIG. 12(B), the source electrode 54 and the gate electrode 51 are kept in the state being electrically shorted until the final stage, and the connection between the source electrode 54 and the gate electrode 51 is required to be cut at the final stage. However, this increases the number of steps, so that it is not preferable in view of production yields and production costs.